The tradeoff is complexity. The microcode must be carefully arranged so that the instructions in delay slots are either useful setup for both paths, or at least harmless if the redirect fires. Not every case is as clean as RETF. When a PLA redirect interrupts an LCALL, the return address is already pushed onto the microcode call stack (yes, the 386 has a microcode call stack) -- the redirected code must account for this stale entry. When multiple protection tests overlap, or when a redirect fires during a delay slot of another jump, the control flow becomes hard to reason about. During the FPGA core implementation, protection delay slot interactions were consistently the most difficult bugs to track down.
《3D打印：从想象到现实》一书出版的2013年，也被视为“中国3D打印元年”。彼时，海尔集团创始人张瑞敏为前者写下了这样的书评：
。PDF资料是该领域的重要参考
На Бали задержали двух россиян по подозрению в производстве мефедронаВ Индонезии задержали двух россиян по подозрению в производстве мефедрона。新收录的资料对此有专业解读
Right now, this has only been me working alone while integrating snippets and improvements other people have recommended. I would like to try reading pre-existing APL code and working with it to see what the process is like when it's not just yourself (Currently reading through Aaron Hsu's dissertation to do this).